Programmable processor-based devices are increasingly common in the current consumer products marketplace. One popular class of such devices are data storage devices, such as hard disc drives, optical disc (CD, DVD) players and recorders, magnetic digital tape (DAT) players and recorders, digital cameras, etc.
Such devices typically include a hardware/firmware based data interface circuit with a programmable processor (controller). A host device makes data transfer requests over a primary communication pathway using an established communications protocol (Fibre Channel, SCSI, ATA, RS-232, etc.).
The controller provides top level control of the operation of the device using associated programming stored in memory. Such programming includes operational routines that are executed as required to facilitate normal operation of the device, as well as test routines that can be selectively executed to certify and diagnose the operation of the device during manufacturing and field use. The test routines can be accessed through the primary communication pathway or through a separate command pathway, such as a serial bus connected in parallel with the primary pathway.
Manufacturers often concurrently offer a number of different types and models of processor-based devices with varying levels of performance and features to meet different price points and other marketing requirements. Such devices may utilize different types and architectures of processors, such as digital signal processors, DSPs; standard PC-type processors such as the Intel Pentium® and X86 classes of processors; ARM devices (Advanced RISC (Reduced Instruction Set Computer) Machines), etc. Each of these generally has unique coding structures and requirements specific to the particular hardware architecture of the individual processors.
Because market pressures continue to press manufacturers to develop successive generations of processor-based devices with ever higher levels of performance at successively lower cost, there remains a continued need for improvements in the manner in which test code is generated and implemented, and it is to such improvements that the present disclosure is directed.